![]() ![]() 8 ha //unsigned value extends to: sha //signed value extends to: If the MSB of the size is one and is signed, sign extension will occur. Signed values are not necessarily sign extended because the sign bit is the MSB of the size, not the MSB of the value. If is smaller than value MSB s of value are truncated with warning (tool dependent) If is larger than value MSB s of value are filled Regardless of MSB being 0 or 1, 0 filling is done Left-most Bit Expansion 0 0 extend 1 0 extend x X x or X extend z Z z or Z extendĤ Verilog - Representation of Number Literals(cont.) Some Examples: reg v = 8 b1011 initial $displayb ("v signed =\t", v) //v =, MSBs filled with zeros reg w = 3 b1011 initial $displayb ("w signed =\t", w) //w =, bit 3 truncated then 0 filled //generates Modelsim compile warning (Redundant digits in numeric literal) //Runs without warning or errorĥ Verilog - Representation of Number Literals (cont.) Literal numbers may be declared as signed: 4shf 4 bit number (1111) interpreted as a signed 2s complement value Decimal value is -1. radix Radix of the number b or B : binary o or O : octal h or H : hex d or D : decimal default is decimalĢ Verilog - Representation of Number Literals(cont.) Possible values for value are dependent on the radix Format Prefix Legal characters binary b 01xXzZ? octal o 0-7xXzZ? decimal d 0-9 hexadecimal h 0-9a-fA-FxXzZ? The underscore is a separator used to improve readability e.g.: is easily read as 0x2AE5 The character x or X represents unknown The character z or Z represents high impedance The character? or? same as Z (high impedance) The character? is also don t care to synthesisģ Verilog - Representation of Number Literals(cont.) If prefix is preceded by a number, number defines the bit width If no prefix given, number is assumed to be 32 bits Verilog expands to fill given working from LSB to MSB. A separator, single quote, not a backtick signed Indicates if the value is signed. Barbossa) Numbers are represented as: value ( indicates optional part) size The number of binary bits the number is comprised of. 1 Verilog - Representation of Number Literals. ![]()
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